Intel Newsroom

Sustaining 1TF on DGEMM was explicitly mentioned by Intel in the presentation/briefing.

It's also mentioned in the press release:

http://newsroom.intel.com/community/intel_newsroom/blog/2011/11/15/intel-reveals-details-of-next-generation-high-performance-computing-platforms

"The first presentation of the first silicon of “Knights Corner” co-processor showed that Intel architecture is capable of delivering more than 1 TFLOPs of double precision floating point performance (as measured by the Double-precision, General Matrix-Matrix multiplication benchmark -- DGEMM). This was the first demonstration of a single processing chip capable of achieving such a performance level."

Does it mean much? It means something to me, and is a great first step for those of us running compute intensive codes. They really wouldn't get far if they designed the chip only around being able to do this.

As I mentioned elsewhere in the thread, the article text is incorrect. The chip we're discussing is Knights Corner not Knights Ferry. The latter has been in early user hands for quite some time now and I've spent plenty of time hacking on it. Knights Corner is the new chip that is working it's way to production via the usual process with ship for revenue in 2012.

The 2018 target is for an exascale machine, not shipment of initial MIC devices. TACC have already announced they'll be building out a 10 petaflop MIC based system next year to go operational by 2013.

Yes, I'm comparing a chip that has…

Agreed.

Change is coming! I feel like 5Gbit is mostly useful for switches, that a lot of other products are gonna jump direct to 10GBase-T.

25GBase-T or 40GBase-T is probably going to be a bit more energy intensive for a while, and 30m is ok but not great range if you're trying to span an office.

Ideally I'd really like to see optics costs fall, for consumers to start picking it up. Maybe the future is SFP everywhere and perhaps that makes sense (swap out transciever if one fails! Direct Attach Copper maybe or Base-T for convenience). But I really hope we see some real inroads, some of this separation between consumer & commercial go away.

I got a 150' 40Gbps fiber optic display port cable for ~$50, over half a decade ago. Unidirectional (I believe) but still just totally reset my expectations of what stuff really has to cost! Seemed too good to be true but still using it! We're spending more and more energy and effort trying to squeeze bits down a difficult copper channel, but optics right there, getting easier and easier.

I wish Intel hadn't given up on on-package interconnects (available on package on Xeon & Phi, 2016-2019). High end at the time. But now PCIe, USB, and DisplayPort all have optical capable specs, and the energy cost and distance of copper keeps making less and less sense. We gotta go forward, and the break from scant tiny consumer bandwidth to something much different feels like a potential dam burst.

I hope Intel's still doing some optical stuff…

Moore's 1965 paper was literally about "the complexity for minimum component costs" [1]. So you're right that transistors on a chip is more applicable then just die density. But as too often nowadays you left out the "minimum cost" aspect. Moore's law is not only about tech performance, it's about economics. Everybody knew the "minimum cost" part would fall the first, and it did.

When the least cost offering improves, when things get better and cheaper, everyone follows. The lowering cost per function increases the addressable market, which can then sustain increasing investments. This is the virtuous cycle that moved the industry forward for a long time.

When the economic part stops, when you can get more transistors but only at a higher cost, then the virtuous cycle stops. Technical progress do continue, but you will have less players at each new step: only those who can absorb the increasing costs will keep on playing at the leading edge. And production costs will still rise. If the market gets smaller due to increasing prices, and the production cost keep on raising, you will see a slow down as it will take more time to amortize investments.

The big players are worried about this: slow down has in itself the specter of followers catching up (eventually...), leading to commoditization. We're definitely not there yet, but it's not a good perspective. Definitely bad for their stock. So the cost has been taken out. At first the NRE part was dropped of the equation, to…

Maybe it's just because this is a more technical update, but the responses from Intel[1] and AMD really seem like night and day to me. This page is for the most part clearly written and only has a minimal amount of BS before getting to the point about:

• identifying the problems (without casting aspersions on other vendors or being FUD-y about issues that don't exist)

• specifying what _specific_ hardware is vulnerable

• info for developers (here's the patches you need if you're building your own kernel, here's a new compiler intrinsic that will be available soon for your applications, here [2] is code to implement the intrinsic yourself if you're not able to update your compiler)

• slightly less useful info for end users (update your stuff, which isn't necessarily actionable advice for some of us on Android)

• lets us know that future hardware may still require the KPTI patches, but it sounds like the speculative execution issues that aren't fixed by the patches ("variant 1") will be fixed in hardware

Things that still aren't great:

• no mention of performance impact of their various mitigation strategies that surely someone would have benchmarked in the 6 months they've been working on this. However I'm sure before too much longer someone will grab that code from their github and compare it to regular memory accesses

• this FAQ purporting to be in layman's terms definitely isn't [3]. Imagine telling your elderly relative that saw an article about scary computer…

Despite following this stuff some, I think I was about as confused to where they were.

Did not realize most of the actual production was still at 4nm range. Apparently mostly Fab 34, Leixlip, Ireland (4nm, 3nm, Meteor Lake). Actually thought it was somewhere in Malaysia or America. "Normal" EUV manufacturing. [1][2]

[1] https://newsroom.intel.com/de/intel-foundry/updates-intels-10-largest-construction-projects

[2] https://en.wikipedia.org/wiki/List_of_Intel_manufacturing_sites

Apparently, Fab 52 has started making stuff (1.8nm, High-NA EUV, Panther Lake), yet they're still in try-out and testing mode, and not really production. Working fab though. [3]

[3] https://www.tomshardware.com/tech-industry/semiconductors/intels-fab-52-is-bigger-and-better-equipped-than-tsmcs-arizona-facilities-intels-production-volumes-dwarf-tsmcs-operations-in-the-u-s

Wikipedia stuff listed looks kind of weird frankly. Seems like they send them all the way to Malaysia for packaging. Also, really severe difference between 22nm/14nm/10nm sites (9 different sites with at least one size, 4 with all three sizes) and 7nm/4nm/3nm/2nm/1.8nm/1.4nm. Nothing listed on 7nm, only 1 listed 4nm/3nm, 2nm got scrapped, only listing 1.8nm, and 1.4nm. They apparently moved a bunch of stuff around also to be more confusing. 10nm became Intel7 and 7nm became Intel4. [4]

[4] https://en.wikipedia.org/wiki/7_nm_process#Expected_commercialization_and_technologies

Intel's published reliability data shows a ~0.4% annual failure rate of the X-25M: http://images.anandtech.com/reviews/storage/Intel/320/reliability.jpg

They claim greater reliability for the new 320 series which is based on the same controller hardware, and have upped the warranty of that from 3 to 5 years: http://newsroom.intel.com/community/intel_newsroom/blog/2011/05/19/chip-shot-new-5-year-limited-warranty-on-intel-ssd-320

There definitely has been a lot of noise about high failure rates in OCZ's Vertex series, but it doesn't seem to be anything inherent in SSDs or even the SandForce chipset. OCZ shipped SSDs with pre-release firmware, uses a number of different flash chip vendors, and may not test sufficiently prior to release.

I'd say buying a reliable SSD is more difficult than buying a HDD since there are quite a few variables, but there is sufficient information available these days to make an informed choice.

Performance is really worth it though! I wish there wasn't such a focus on boot times because I only have to reboot my MacBook Pro for certain OS updates or when it crashes, but high performance random IO makes a huge difference in day to day use. Applications launch almost instantly, I can do a find+grep on nested directories containing thousands of files in a fraction of a second, and compile times are pretty much only limited by CPU speed.