James Bowman

I still doubt it's better at reducing complexity because that stuff is horrific in RTL. I can express it with a parallel programming language with ease. A parallel programming language with macros and automatic placement onto cores/DSP's would be even easier. Describe it, compile, and it probably runs. With hardware, I'm looking at several more layers of verification, testing, material checks, and so on.

High-level synthesis tools on the other hand might make your claim true. They're a combo of HW and SW languages.

"A simple example of such would be a dedicated Forth processor plus a Forth implementation. They two together are often much simpler than, say, a standalone Forth implementation for x86.
"

Simpler for who? The person implementing both a Forth implementation and a x86 processor? Or the person just implementing a Forth on x86? I've seen Forth implementations in SW. They're trivial. Compilers, libraries, and hardware do all the heavy lifting. I'll put it to the test, though, as I feel you might have picked a good example.

J1 Forth CPU Verilog code
http://excamera.com/files/j1demo/verilog/j1.v

eForth assembler for Z80 & such in few assembly instructions
http://www.figuk.plus.com/4thres/systems.htm

Forth interpreter in Ada (1985)
http://www.forth.com/archive/jfar/vol3/no2/article7.pdf

Maybe it's just that I don't know Verilog. However, the Verilog code looks more like the assembler in second link. It's like a pile of gibberish. The Ada code is very…

I ran out to Barnes & Noble and bought your book right after seeing your post and seeing one nearby that had it in stock. (Amazon was going to take a couple weeks to send it. Actually some other company was the sender. Weird. Also I didn’t notice you had it online but I like having the book and paying you anyway. :) )

So I picked up the book Thursday and finished the basic ray tracer Friday :) Not counting chapter 5 of course so there’s a lot more that I can add from here but it’s made me interested in multi-processing to make it faster, (mine is in unoptimized Python currently, using pygame to have a canvas/window and calling it for each pixel), maybe using GPU shaders to do it (never used those before), and learning about techniques other people are using[1][2] (from YouTube etc), and going down the rabbit hole of old CGI animations from the last 50 years[3].

Looking forward to the second half of the book this weekend. I have written a basic renderer before. I did an independent study class in college and I wrote a stereoscopic one for the iGlasses VR headset[4] in the 90s (you just have to draw using two cameras and interlace the images).

[1] https://youtu.be/A61S_2swwAc “NamePointer - I made a better ray-tracing engine”

[2] https://excamera.com/sphinx/article-ray.html “A reasonably speedy Python ray-tracer”

[3] https://youtu.be/WV4qXzM641o “The Compleat Angler (1978)” Ray tracing animation with refraction, rippling water, etc. from 1978!

[4]…

Unfortunately the question is, strictly speaking, unanswerable.
The best one could do is come up with a specific design and estimate the number of gates needed, and then one couldn't be sure exactly how suboptimal the design in question is, regarding gate count.
One of the most basic design choices is probably how much and which work to do using dedicated logic, and how much to do using general purpose logic and microcode.
One may get an idea of the order of magnitude of gates required by taking a minimal CPU core (say, the j1 core from http://excamera.com/sphinx/fpga-j1.html), writing a minimal lisp interpreter on that core, and adding the gates needed to store the interpreter to the number of gates used for the core. This is left as an exercise for the reader.

Well there's an active community of people writing their own operating systems. Why do that when Linux is available? I don't think a further reason is required for the hobbyist.

But there are various actual products which result from efforts to create a minimal forth that are interesting. One of my favorites is the J1 CPU: https://www.excamera.com/sphinx/fpga-j1.html

Also I think many of these personal forths have explored interesting areas of programming language design, and when I have read about those which have been made public I often learn something new. It's like code poetry.

Huh? There's loads of cheap dev kits for a few 10's of bucks on eBay.

Example: http://www.ebay.com/itm/ALTERA-FPGA-Cyslonell-EP2C5T144-Minimum-System-Learning-Development-Board-/401255830236?var=&hash=item5d6cb612dc:m:m-tMy5MOZfxAvfiGVkWVMGg

This uses the EP2C5T144. Some basic getting started info here: http://www.leonheller.com/FPGA/FPGA.html [Leon Heller]

You can run a free copy of Quartus and use it to run Verilog / VHDL cpus, or anything else you want to do.

Same applies to the Xilinx FPGAs.

A really cool example project: http://excamera.com/sphinx/fpga-j1.html

This talk covers some of the design decisions that lead to the design of the uxn stack machine.

https://vimeo.com/771406693#t=85m30s

C source code of the VM, 100 lines.

https://git.sr.ht/~rabbits/uxn/tree/main/item/src/uxn.c

An example assembly file for that stack machine

https://git.sr.ht/~rabbits/uxn/tree/main/item/projects/examples/exercises/fib.tal

Another stack machine designed to target FPGA with an elegant design, mentioned in the talk above.

https://excamera.com/sphinx/article-j1a-swapforth.html