Cadence's Breakfast Bytes blog, covering semiconductor history, chip manufacturing, process nodes, and design tools.
HN links it for semiconductor history and explanations, such as the point that process node names are made up and not measurements.
Actually, it's not ignorant of history. "The Internet" as most people know it today, and for easily multiple decades now, has always had ads. It's only back when the BBS boards were the big thing that perhaps you would be correct, but even then you had people trying to make money somehow; usually to pay for the gear they were using to run their own websites, etc and so forth.
Now to be fair to you, by comparison to today, the 'original' internet was by far much "free'er" than it is now since subscription fees and such didn't really exist; but it was never completely free. (*for anyone not just hijacking someone elses connection somehow via wardriving for open wifi and such like that.)
Ultimately you still had to pay a ISP of some sort, or going back far enough your telephone provider for dial up. Though that might be somewhat redundant to split them up since most telecoms tend to provide internet, and ISP's tend to provide some form of telephony now too. I say tend to, since it's not 100% across the board with all of them.
Now to be fair to you, you are technically correct that the internet that was made available to us all back in 1993 was technically 'free', but this is not the kind of technically correct that is the best kind of correct, because ultimately people still immediately started trying to use things like affiliate links and advertisements to pay for their hardware or lifestyles.
That said, there is one caveat I must make clear. In 1993, I would have just…
DPUs/SmartNICs are a partial industry response to AWS Nitro (based on Annapurna acquisition) which performs I/O (network/storage) virtualization.
Nvidia DPU is based on Mellanox acquisition
AMD DPU is based on Pensado acquisition
Intel has an in-house DPU
There was a 2018 talk on AWS Nitro, https://www.youtube.com/watch?v=e8DVmwj3OEs
Cadence summary: https://community.cadence.com/cadence_blogs_8/b/breakfast-bytes/posts/the-aws-nitro-project
James Hamilton summary: https://perspectives.mvdirona.com/2019/02/aws-nitro-system/
The founder of Annapurna-Nitro is now at https://www.lightbitslabs.com/, which has created the NVMEoF (NVME over Fabric, i.e. Ethernet or FiberChannel) standard. This is implemented via a software driver or hardware accelerator. Both DPUs and NVMEoF can be viewed as an attempt to standardize "composable data center" architectures pioneered by AWS Nitro.
> but this is HN... what other uses can we put through this / what advantages does this physical architecture give us?
A good place to start is the decade-old NetFPGA SmartNIC research project from University of Cambridge, now in the 5th generation of hardware, with earlier boards sometimes available on eBay. https://netfpga.org/
A line-rate, flexible, and open platform for research,
and classroom experimentation. More than 3,500 NetFPGA
systems have been deployed at over 300 institutions in
over 60 countries around the world.
Several hundred papers have been published:…
Marvell was recentlty showing off a a PCIe 6.0 Alaska-P retimer that's good for pcb, copper cable, & optical interconnect. Doesn't include optical transceivers but does show the growing interest in optical PCIe. https://www.servethehome.com/marvell-extending-pcie-gen6-reach-from-3-5-inches-to-meters/
Right now optical seems exotic & expensive but we seem near a severe tipping point. Copper keeps facing increasingly channeling signal integrity challenges, requiring expensive & energy consuming retimers. Meanwhile we think we can keep scaling optical down, integrating silicon photonics, getting increasingly lower pJ/b energy costs. Without the range & signal integrity issues. Not super duper deep but this 2 year old Cadence blog post goes into it, and it seems indeed to be where things are heading. https://community.cadence.com/cadence_blogs_8/b/breakfast-bytes/posts/photonics-keynote
TSMC's original 7nm process 7FF did not use EUV. They did introduce EUV for certain layers in N7+, their "second generation" 7nm process. Don't confuse N7+ with N7P, the performance-improved version of 7FF....
There's more information at https://fuse.wikichip.org/news/2567/tsmc-talks-7nm-5nm-yield-and-next-gen-5g-and-hpc-packaging/ or https://community.cadence.com/cadence_blogs_8/b/breakfast-bytes/posts/tsmc-may-2020 .
(This is why I always try to give the full name of the process, in as much specificity as I know it; it's very easy to talk at cross purposes about N7+ and N7P despite them being quite different.)
While this is true, it's also funny to note that Apple was only founded in South Bay because Jobs and Wozniak wanted to be close to their families. There was already talent in the region, but the origin of that talent started the same way. Shockley (of Shockley Semiconductor and traitorous eight fame) moved the company from LA to South Bay to take care of his mother [1]. Silicon Valley is only Silicon Valley because of "I want to be with my parents" decisions.
[1] https://community.cadence.com/cadence_blogs_8/b/breakfast-bytes/posts/the-birthplace-of-silicon-valley
"Gordon Freeman" (as he is affectionately referred to) would argue otherwise, fervently!
- https://www.cs.binghamton.edu/~pmadden/pubs/dispelling-ieeedt-2013.pdf
- https://dl.acm.org/doi/abs/10.1145/1324499.1324502
- https://community.cadence.com/cadence_blogs_8/b/ii/posts/eda-workshop-debate-erupts-over-parallel-programming?CommentId=504ea082-91ee-455b-aede-fdad45e9a76d&pifragment-1576=310
- https://www.cs.binghamton.edu/~pmadden/